RfidResearchGroup/proxmark3
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Author SHA1 Message Date
Chris 5c0517526a CHG: 'hf mf csave' 
CHG: 'hf mf esave'  -
 2018-09-16 23:05:09 +02:00
Chris 151ad3b31f CHG: missing declaration 2018-09-16 22:40:09 +02:00
Chris a965dff52c CHG: 'lf t55xx deviceconfig' - better helptext. Command takes timing values in FIELD CLOCK, which is converted to (US) on device. 2018-09-16 20:54:08 +02:00
Chris 5a95cee5ed clean 2018-09-16 20:49:29 +02:00
Chris d596343438 chg: 'lf t55xx deviceconfig' - assume total time, and writeenable when writting... 2018-09-16 20:48:39 +02:00
Chris 02cc278e19 chg: remove warnings on coverity 
chg: encapsule flasmem function calls
 2018-09-16 20:47:23 +02:00
Chris df70619888 chg: turn off FPC specific functions (still work in progress) 2018-09-15 18:33:16 +02:00
Chris 1d322686bb CHG: added possible SE credential identification text 2018-09-15 12:58:50 +02:00
Chris 97f9c1a49f text 2018-09-15 12:03:01 +02:00
Chris d94ef81973 Merge branch 'master' of https://github.com/RfidResearchGroup/proxmark3 2018-09-15 12:01:12 +02:00
Chris 9d1c3a3538 FIX: crash on Bionic libc if CloseProxmark is called twice. (@micolous) 
https://github.com/Proxmark/proxmark3/pull/672
 2018-09-15 12:00:53 +02:00
RFID Research Group 2611eef1b6
Merge pull request #32 from TomHarkness/master 
Fix syntax
 2018-09-15 11:57:55 +02:00
TomHarkness 3e9397e337 Fix syntax 2018-09-15 16:20:44 +10:00
Chris 54bea5a067 textual 2018-09-14 08:13:42 +02:00
Chris b7a1674bf6 helptext 2018-09-14 08:12:03 +02:00
RFID Research Group 63260df31e
Merge pull request #23 from xilni/master 
feature: Handle Kastle format 32 bit cards
 2018-09-14 08:03:21 +02:00
Chris 1fff6ae09a chg: rename variable 2018-09-12 08:01:35 +02:00
Chris 43c399876f chg: helptext 2018-09-12 07:59:43 +02:00
Chris dcd0300913 chg: helptext 2018-09-11 22:14:41 +02:00
Chris ba2543b627 ADD: 'lf t55xx deviceconfig' - command that allows for setting t55xx timings via the client. If run on a RDV40, it also saves the config to flashmemory. This gives you option to have custom timings for your custom antenna in order for your RDV40 to work optimal against a t55xx tag and with your custom antenna. (@iceman) 2018-09-11 18:35:07 +02:00
Chris 5959cdf62c chg: remove some warning of unused variables 2018-09-10 22:49:29 +02:00
Chris 9ee550af45 FIX: lf t55xx detect works better with adjusted timings 
CHG: applied fpga_off patch.
 2018-09-10 21:45:00 +02:00
Chris 0a648d482d chg: remove warning unused variable 2018-09-09 23:16:47 +02:00
Chris d42b4f6ddf CHG: ask clean wave - better start position in signal 2018-09-09 23:02:41 +02:00
Chris c187774a98 fix: hilow fuzzing overlap 2018-09-09 22:08:32 +02:00
Chris b66a481581 cleanup 2018-09-09 19:56:25 +02:00
Chris fef85d4caa chg: 'data load' , 'data norm' etc all commands that manipulate graphbuffer need to update signalproperty struct. But its not based on the signed data. 2018-09-09 19:56:11 +02:00
Chris bc0ffa9e51 fix: remove zeromean 
chg: cleanup
 2018-09-09 19:54:22 +02:00
Chris 0a548c5da0 clean up 2018-09-09 18:08:20 +02:00
Chris c4b3edef89 fix: double free bug on MacOS (thanks @drandreas) 2018-09-09 18:03:49 +02:00
Chris 6176103023 cleanup 2018-09-09 12:36:44 +02:00
Chris be57354478 chg: seems to be a free bug on macos 2018-09-09 12:36:16 +02:00
Chris d774e4c84f Chg: step2 in the signed vis unsigned graphbuffer signal processing. 
It will break some tone-based demods like ti etc.
 2018-09-09 12:34:43 +02:00
Chris 90f29bf430 chg: call specific noise function 2018-09-09 11:29:37 +02:00
Chris ba9de80eeb chg: 'hf legic sim' break sim by sending another cmd 2018-09-09 11:29:11 +02:00
Chris 4e42d11d15 FIX: HI/LOW fuzz levels. (one step for ASK/NZR etc) 2018-09-08 20:54:54 +02:00
Chris 1d51b2cd8f fix: variable name 
textual
 2018-09-08 14:15:05 +02:00
Chris 79afc031fc FIX: LF antenna discharge after interfer timings. As suggested by @ts And thanks to @drandreas who patiently explains fpga verilog code to me. 
This introduces a new majoe mode, FPGA_MAJOR_MODE_OFF_LF,  which should ONLY be used in sending loops for LF.   Basically the PWR_LO is set HIGH in order to discharge voltage faster.

Once sending is over,  the normal FPGA_MAJOR_MODE_OFF SHALL be used.
 2018-09-08 14:11:51 +02:00
Chris 56f3ef2a55 chg: helptext (@drandreas) 
chg: 'hf legic esave'  now saves to both BIN / EML
 2018-09-08 12:38:36 +02:00
Chris 65b29410d4 chg.. space.. 2018-09-08 11:23:17 +02:00
Chris 0e2dbe7424 chg: code cleanup 2018-09-08 11:18:10 +02:00
Chris 0b673683d9 fix: 'hf legic sim' no assign... (Thanks to @625) 2018-09-08 11:17:31 +02:00
Chris e29bb51e76 chg;: idea of auto adjusting signal to zero mean baseline in order to compensate different antennas 2018-09-07 23:47:42 +02:00
Chris 51fdde0bbf code clean 2018-09-07 23:46:44 +02:00
Chris b7d0786ab8 code clean 2018-09-07 23:45:52 +02:00
Chris e5e8c0b5d8 not needed anymore 2018-09-07 23:45:08 +02:00
Chris bb5804b1b0 text 2018-09-06 21:47:57 +02:00
Chris 3a338f566e chg: zero mean in hidfskdemod 
chg: idteck demod return values
 2018-09-06 21:44:53 +02:00
Chris 24eaac8681 CHG: the thread comms refactoring from offical pm3 repo 
chg: FPC com speed limited to 115200 when compiled with FPC
chg: USART remake (@drandreas)
 2018-09-06 21:43:20 +02:00
RFID Research Group eb0b5116a2
Merge pull request #25 from drandreas/rdv4-legic 
Legic Tag Simulator
 2018-09-06 20:26:39 +02:00