d18c7db 1c38843b3f Updated logic in lo_read.v so it's much tidier now, better timing. ... Commented source and recompiled FPGA to new fpgaimg.c		2009-04-16 23:09:21 +00:00
..
fpga.mpf
fpga.ucf
fpga.v
go.bat
hi_iso14443a.v
hi_read_rx_xcorr.v
hi_read_tx.v
hi_simulate.v
lo_read.v	Updated logic in lo_read.v so it's much tidier now, better timing.	2009-04-16 23:09:21 +00:00
lo_simulate.v
sim.tcl
testbed_fpga.v
testbed_hi_read_tx.v
testbed_hi_simulate.v
testbed_lo_read.v	Updated logic in lo_read.v so it's much tidier now, better timing.	2009-04-16 23:09:21 +00:00
testbed_lo_simulate.v
util.v
xst.scr