| .. |
|
tests
|
New LF edge detection algorithm + lowpass filter
|
2014-06-27 14:27:03 +02:00 |
|
clk_divider.v
|
THIS REQUIRES A BOOTROM UPDATE!! To save FPGA area, split the LF and HF bitstreams and load them on-demand.
|
2014-06-20 01:02:59 +02:00 |
|
fpga.ucf
|
- improved reader sensitivity for 14443a cards (FPGA change!)
|
2013-11-19 18:52:40 +00:00 |
|
fpga_hf.bit
|
change: remove jerry-riged hysteresis based receiver from hi_read_tx
|
2018-08-12 09:59:48 +02:00 |
|
fpga_hf.v
|
FIX: @satsuoni fixes with pm3 offical version.
|
2017-10-25 13:59:49 +02:00 |
|
fpga_lf.bit
|
FIX: @satsuoni fixes with pm3 offical version.
|
2017-10-25 13:59:49 +02:00 |
|
fpga_lf.v
|
CHG: FeliCa implemenation by @satsuoni
|
2017-10-20 20:27:44 +02:00 |
|
go.bat
|
THIS REQUIRES A BOOTROM UPDATE!! To save FPGA area, split the LF and HF bitstreams and load them on-demand.
|
2014-06-20 01:02:59 +02:00 |
|
hi_flite.v
|
chg: reverting old @satsuoni felica changes.
|
2017-10-23 21:56:47 +02:00 |
|
hi_iso14443a.v
|
CHG: Thanks to @pwpiwi , his latest adjustments to HF.
|
2017-11-10 19:51:37 +01:00 |
|
hi_read_rx_xcorr.v
|
change: fixed xcorrelation for strong signal
|
2018-08-10 02:36:04 +02:00 |
|
hi_read_tx.v
|
change: remove jerry-riged hysteresis based receiver from hi_read_tx
|
2018-08-12 09:59:48 +02:00 |
|
hi_simulate.v
|
CHG: FeliCa implemenation by @satsuoni
|
2017-10-20 20:27:44 +02:00 |
|
hi_sniffer.v
|
chg: reverting old @satsuoni felica changes.
|
2017-10-23 21:56:47 +02:00 |
|
lf_edge_detect.v
|
New LF edge detection algorithm + lowpass filter
|
2014-06-27 14:27:03 +02:00 |
|
lo_edge_detect.v
|
fix: (issue #72) LF simulation didn't work with lo_edge_detect.v
|
2015-03-06 07:42:54 +01:00 |
|
lo_passthru.v
|
fpga/fpga_hf.v, fpga_lf.v, lo_edge_detect.v, lo_passthru.v, lo_read.v: copyright notice
|
2014-06-20 12:38:58 +02:00 |
|
lo_read.v
|
new command "lf snoop" to snoop raw ADC values
|
2014-06-21 21:33:54 +02:00 |
|
lo_simulate.v
|
setting svn:eol-style=native on files, part 3
|
2010-02-22 19:29:05 +00:00 |
|
lp20khz_1MSa_iir_filter.v
|
New LF edge detection algorithm + lowpass filter
|
2014-06-27 14:27:03 +02:00 |
|
Makefile
|
FIX: @satsuoni fixes with pm3 offical version.
|
2017-10-25 13:59:49 +02:00 |
|
min_max_tracker.v
|
fpga/min_max_tracker.v: english
|
2014-06-27 23:28:56 +02:00 |
|
sim.tcl
|
setting svn:eol-style=native on files, part 3
|
2010-02-22 19:29:05 +00:00 |
|
testbed_fpga.v
|
setting svn:eol-style=native on files, part 3
|
2010-02-22 19:29:05 +00:00 |
|
testbed_hi_read_tx.v
|
setting svn:eol-style=native on files, part 3
|
2010-02-22 19:29:05 +00:00 |
|
testbed_hi_simulate.v
|
setting svn:eol-style=native on files, part 3
|
2010-02-22 19:29:05 +00:00 |
|
testbed_lo_read.v
|
setting svn:eol-style=native on files, part 3
|
2010-02-22 19:29:05 +00:00 |
|
testbed_lo_simulate.v
|
setting svn:eol-style=native on files, part 3
|
2010-02-22 19:29:05 +00:00 |
|
util.v
|
setting svn:eol-style=native on files, part 3
|
2010-02-22 19:29:05 +00:00 |
|
xst_hf.scr
|
THIS REQUIRES A BOOTROM UPDATE!! To save FPGA area, split the LF and HF bitstreams and load them on-demand.
|
2014-06-20 01:02:59 +02:00 |
|
xst_lf.scr
|
THIS REQUIRES A BOOTROM UPDATE!! To save FPGA area, split the LF and HF bitstreams and load them on-demand.
|
2014-06-20 01:02:59 +02:00 |
|
xst_nfc.scr
|
ADD: FPGA missing file Thanks to @Satsuoni
|
2017-10-10 14:03:09 +02:00 |
bf123082e8