Commit graph

370 commits

Author SHA1 Message Date
Philippe Teuwen 64eb93c9c4 style 2019-04-17 22:08:10 +02:00
Philippe Teuwen be15ad7fec Viva la revolucion 2019-04-17 21:30:01 +02:00
Philippe Teuwen 8bfc5c1b47 New reply frames reception 2019-04-17 01:06:26 +02:00
Philippe Teuwen 96843c3f47 New reply frames transmission (reception still to be done) 2019-04-16 23:15:23 +02:00
Philippe Teuwen 8b99df9074 Merge branch 'master' into experimental_varlen2
* master: (33 commits)
  unified Proxmark3 text
  removed
  more colors
  rearranged banner output and messages
  textual
  revert
  revert
  revert
  style spaces
  fix fake com port
  style
  style
  styles
  not null?
  style
  style
  style
  style
  style
  style
  ...
2019-04-16 20:58:58 +02:00
Philippe Teuwen 83571f02a0 style 2019-04-16 20:49:32 +02:00
Philippe Teuwen 44bbb7d2c7 new frame format, smaller and with crc. Some code simplified 2019-04-16 20:00:17 +02:00
iceman1001 e04e2d6fa7 revert 2019-04-16 17:02:21 +02:00
iceman1001 64c7ee117e revert 2019-04-16 17:00:18 +02:00
iceman1001 aaedeafbb1 style spaces 2019-04-16 16:56:56 +02:00
Philippe Teuwen 34467b7550 Variable length frames, part1: USB Host -> Pm3 2019-04-16 10:01:08 +02:00
Philippe Teuwen 04c0384d3e Testing pm3 communication 2019-04-14 17:25:17 +02:00
iceman1001 d28fac3ef0 style 2019-04-14 11:43:05 +02:00
iceman1001 664434dfba Fix: USART calls rx/tx 2019-04-14 11:10:16 +02:00
iceman1001 1e35130fbe missing include 2019-04-07 11:41:43 +02:00
iceman1001 49a0fda10b styles 2019-04-07 11:36:24 +02:00
Philippe Teuwen 07cc0d0a29 make style helped revealing my bug :) 2019-04-02 22:34:00 +02:00
Philippe Teuwen 64ce30c06c make style 2019-04-02 22:32:45 +02:00
Philippe Teuwen 21be6d4400 FPC: got RX working, got client over usart somehow working..., see detailed commit msg
* using WITH_FPC:
  * activate basic usart
  * no double buffer for now, no interrupt
  * usart_dataavailable/usart_readbuffer/usart_writebuffer, to demo it:
    * pm3 client over USB, minicom over usart
    * analyse a d 414243
* using WITH_FPC_HOST:
  * it implies WITH_FPC as it's based on it
  * control pm3 with client over usart
  * EXPERIMENTAL! still some frame desync issues
  * you can connect both from usart & USB with two pm3 clients
    * actually you *have* to connect USB for the moment because
      it's used to send debug messages about buggy usart... See Dbprintf_usb below
  * "sessions": msgs are directed to the latest client to have sent a cmd
  * Dbprintf_usb macro to send msgs to USB client to help debugging usart...
  * We now have an option to run client at different speed as usart is 115200:
    client/proxmark3 /dev/ttyUSB0 -b 115200
  * Consequently, argc,argv handling is a bit revamped, it was so messy...
  * USB and flashing are still at 460800, don't try flashing over usart yet ^^
2019-04-02 22:06:10 +02:00
Philippe Teuwen 7bd95dd5c3 FPC experiments: got so far TX_only, usart=115200 + usb=460800, see full commit msg
* Add \r\n to sent strings
* remove usart_init() from UsbPacketReceive cmd, it's already init in main.
* Add PLATFORM PM3RDV4FPC to ease dev
* TX: US_TCR is len of data to send, not len of buffer
* Use only one PDC bank as we're using it in sync
* Busy loop to wait for end of TX as we'using it in sync
* Change usart speed to 115200
* Don't downgrade USB speed, keep 460800
* Attempt to detect received data, fail so far
2019-04-02 01:06:03 +02:00
iceman1001 52be3f4fe5 chg: 'lf indala clone' - differnt input parms. '-L' gives a long UID.
chg: 'lf indala demod' - tries to descramble parts,  and detection is changed.  Still issues with PSK2..
2019-03-26 09:09:43 +01:00
iceman1001 ca9061bd32 changed byte_t -> uint8_t 2019-03-21 15:19:18 +01:00
Philippe Teuwen a95ff04392 Fix mem leak in flash mem read 2019-03-13 12:46:03 +01:00
Philippe Teuwen 61905d2b19 lfops: add ledcontrol in API 2019-03-12 23:51:30 +01:00
Philippe Teuwen 2c41a61ee3 remove always true cond 2019-03-12 22:52:15 +01:00
Philippe Teuwen d50de828a1 flash write: check first page write 2019-03-12 22:50:29 +01:00
iceman1001 35bc4a975e rename SNOOP -> SNIFF 2019-03-12 13:15:39 +01:00
Philippe Teuwen 961d929f4d changing {} style to match majority of previous style 2019-03-10 11:20:22 +01:00
Philippe Teuwen 0373696662 make style 2019-03-10 00:00:59 +01:00
Philippe Teuwen 8a7c6825b5 armsrc: fix mix of spaces & tabs 2019-03-09 20:34:41 +01:00
Philippe Teuwen 60f292b18e remove spurious spaces & tabs at end of lines 2019-03-09 08:59:13 +01:00
vratiskol 99dc51e005 Mem Leak 2019-02-24 22:02:09 +01:00
iceman1001 f215ebef80 Refactored 'lf t55xx brute', split it up into two commands.
- lf t55xx brute  (tries bruteforcing a range of pwds
- lf t55xx chk    (uses dictionary file or RDV4 flashmem)

FIX: adjust lf sim (@marshmellow42)  see 7008cf9c15
"attempt to speed up the loops waiting for carrier signal to go high or low
by only checking for a halt (button press or usbpol) every 256th loop
iteration. some users were experiencing modulating reactions to be too slow.

ADD: 'lf t55xx chk'
It uses @marshmellows42 idea behind commit  (6178b085a0)
With calculating a baseline (read block0 32times and average the signal-ish) and sampling only 1024 signal data. The algo then proceeds to calc the average and keep track of the candidate which is given the most difference in signal data average value.    I do some squaring and shifting for this.
The candidate is then send back to client to be tested properly with  trymodulation like before.

This seems to work good on t55xx card which has a ASK configuration.

WORK-IN-PROGRESS
2019-01-11 14:46:27 +01:00
iceman1001 0dee369a58 FIX: 'hf tune' - now works... 2019-01-06 20:28:23 +01:00
iceman1001 0fb0c35308 CHG: 'mem load' - the possibility to upload default_iclass_keys.dic, default_keys.dic, default_pwd.dic to predefined flashmemory sections. These will be used in pwd / key checking algorithms on device.
CHG: 'script run read_pwd_mem.lua' - script now can print those uploaded dictionary files.

How to upload
pm3 --> mem load f default_iclass_keys i
pm3 --> mem load f default_keys m
pm3 --> mem load f default_pwd t

How to validate / view
PM3 -->scr run read_pwd_mem -o 237568 -k 8
pm3 -->scr run read_pwd_mem -o 241664 -k 6
pm3 -->scr run read_pwd_mem -o 245760 -k 4
2019-01-01 18:01:40 +01:00
Chris f8c33af1da CHG: FPC connector tests. Device -> Client communications works.
Adjust  armsrc/Makefile   and client/Makefile  to include  the  -DWITH_FPC  flag to compile with FPC enabled.
2018-11-20 10:58:32 +01:00
Chris aa3b322d0f chg: 'analyze a' - some fpc test changes. 2018-11-16 23:59:14 +01:00
Chris fd1c0cac79 FIX: 'standalone mode MattyRun' - compiles and should even work
CHG: 'standalone mode' - generic banner for each mode. Updated the ledshow to @cjbrigato
2018-11-16 02:52:42 +01:00
bogiton 34775c81f5
Added BogitoRun identification 2018-10-21 18:29:49 +00:00
bogiton 8079613b37
Add check for the HF_BOG directive for RunMod 2018-10-16 19:41:05 +00:00
Chris dc67b5d7c9 chg: revert fpga_major mode in LF.
chg: 'lf t55xx deviceconfig'  - persistence to flashmem is now option with param P
2018-09-23 05:29:55 +02:00
Chris 02cc278e19 chg: remove warnings on coverity
chg: encapsule flasmem function calls
2018-09-16 20:47:23 +02:00
Chris ba2543b627 ADD: 'lf t55xx deviceconfig' - command that allows for setting t55xx timings via the client. If run on a RDV40, it also saves the config to flashmemory. This gives you option to have custom timings for your custom antenna in order for your RDV40 to work optimal against a t55xx tag and with your custom antenna. (@iceman) 2018-09-11 18:35:07 +02:00
Chris 24eaac8681 CHG: the thread comms refactoring from offical pm3 repo
chg: FPC com speed limited to 115200 when compiled with FPC
chg: USART remake (@drandreas)
2018-09-06 21:43:20 +02:00
RFID Research Group eb0b5116a2
Merge pull request #25 from drandreas/rdv4-legic
Legic Tag Simulator
2018-09-06 20:26:39 +02:00
Colin J. Brigato 368fe11df0 Second Pass rewrite of flashmem. added command 'mem spibaud' to switch between 24/48Mhz operation. All is more consistant, less messy. All logic rewrittent avoiding multiple flashinit/flashstop. busywait is now at it's lowest possible. Beware : 48Mhz is VERY buggy cause of sillicon bug (see source for more info), and doesn't give much more than 24Mhz for now since we doubled nearly every operation speed here. 2018-09-06 05:15:52 +02:00
AntiCat 61e4eac2b2 Legic: Moved card simulator into separate file & cleaned interface.
Reader and card simulation have almost no common code. Moreover the sim
uses an SSP Clock at 212kHz for all timings to prevent any drifting from
the PRNG. This clock speed is not available in reader simulation mode (SSP
runs at up to 3.4MHz, and changes speed between TX and RX). For these
reasons having the code in separate files makes it significantly cleaner.
2018-09-05 23:03:04 +02:00
Colin J. Brigato 8d673fa1bf First pass rewrite of flashmem driver for optimization. Lot of changes here. Provides PoC of saving and recalling a tag in Standalone mode. Added some printing passthrough to client to azccomodate for vt100 eye-candyness. FastREAD mode implemented for flashmem, testable from client. Beta but functionnal. Reading the whole flash with 1Kb to 32kb buffers was ~730ms, now 380ms Max (even at 24Mhz spi baudrate) 2018-09-03 00:02:44 +02:00
Chris f1d0e9db4d fix: revert back 2018-08-29 19:42:46 +02:00
Chris 42e883f67b FIX: print_result - now prints correct len.
FIX: DOWNLOAD_BUFFER -  now with correct result logic
2018-08-28 21:15:28 +02:00