Commit graph

348 commits

Author SHA1 Message Date
Philippe Teuwen a95ff04392 Fix mem leak in flash mem read 2019-03-13 12:46:03 +01:00
Philippe Teuwen 61905d2b19 lfops: add ledcontrol in API 2019-03-12 23:51:30 +01:00
Philippe Teuwen 2c41a61ee3 remove always true cond 2019-03-12 22:52:15 +01:00
Philippe Teuwen d50de828a1 flash write: check first page write 2019-03-12 22:50:29 +01:00
iceman1001 35bc4a975e rename SNOOP -> SNIFF 2019-03-12 13:15:39 +01:00
Philippe Teuwen 961d929f4d changing {} style to match majority of previous style 2019-03-10 11:20:22 +01:00
Philippe Teuwen 0373696662 make style 2019-03-10 00:00:59 +01:00
Philippe Teuwen 8a7c6825b5 armsrc: fix mix of spaces & tabs 2019-03-09 20:34:41 +01:00
Philippe Teuwen 60f292b18e remove spurious spaces & tabs at end of lines 2019-03-09 08:59:13 +01:00
vratiskol 99dc51e005 Mem Leak 2019-02-24 22:02:09 +01:00
iceman1001 f215ebef80 Refactored 'lf t55xx brute', split it up into two commands.
- lf t55xx brute  (tries bruteforcing a range of pwds
- lf t55xx chk    (uses dictionary file or RDV4 flashmem)

FIX: adjust lf sim (@marshmellow42)  see 7008cf9c15
"attempt to speed up the loops waiting for carrier signal to go high or low
by only checking for a halt (button press or usbpol) every 256th loop
iteration. some users were experiencing modulating reactions to be too slow.

ADD: 'lf t55xx chk'
It uses @marshmellows42 idea behind commit  (6178b085a0)
With calculating a baseline (read block0 32times and average the signal-ish) and sampling only 1024 signal data. The algo then proceeds to calc the average and keep track of the candidate which is given the most difference in signal data average value.    I do some squaring and shifting for this.
The candidate is then send back to client to be tested properly with  trymodulation like before.

This seems to work good on t55xx card which has a ASK configuration.

WORK-IN-PROGRESS
2019-01-11 14:46:27 +01:00
iceman1001 0dee369a58 FIX: 'hf tune' - now works... 2019-01-06 20:28:23 +01:00
iceman1001 0fb0c35308 CHG: 'mem load' - the possibility to upload default_iclass_keys.dic, default_keys.dic, default_pwd.dic to predefined flashmemory sections. These will be used in pwd / key checking algorithms on device.
CHG: 'script run read_pwd_mem.lua' - script now can print those uploaded dictionary files.

How to upload
pm3 --> mem load f default_iclass_keys i
pm3 --> mem load f default_keys m
pm3 --> mem load f default_pwd t

How to validate / view
PM3 -->scr run read_pwd_mem -o 237568 -k 8
pm3 -->scr run read_pwd_mem -o 241664 -k 6
pm3 -->scr run read_pwd_mem -o 245760 -k 4
2019-01-01 18:01:40 +01:00
Chris f8c33af1da CHG: FPC connector tests. Device -> Client communications works.
Adjust  armsrc/Makefile   and client/Makefile  to include  the  -DWITH_FPC  flag to compile with FPC enabled.
2018-11-20 10:58:32 +01:00
Chris aa3b322d0f chg: 'analyze a' - some fpc test changes. 2018-11-16 23:59:14 +01:00
Chris fd1c0cac79 FIX: 'standalone mode MattyRun' - compiles and should even work
CHG: 'standalone mode' - generic banner for each mode. Updated the ledshow to @cjbrigato
2018-11-16 02:52:42 +01:00
bogiton 34775c81f5
Added BogitoRun identification 2018-10-21 18:29:49 +00:00
bogiton 8079613b37
Add check for the HF_BOG directive for RunMod 2018-10-16 19:41:05 +00:00
Chris dc67b5d7c9 chg: revert fpga_major mode in LF.
chg: 'lf t55xx deviceconfig'  - persistence to flashmem is now option with param P
2018-09-23 05:29:55 +02:00
Chris 02cc278e19 chg: remove warnings on coverity
chg: encapsule flasmem function calls
2018-09-16 20:47:23 +02:00
Chris ba2543b627 ADD: 'lf t55xx deviceconfig' - command that allows for setting t55xx timings via the client. If run on a RDV40, it also saves the config to flashmemory. This gives you option to have custom timings for your custom antenna in order for your RDV40 to work optimal against a t55xx tag and with your custom antenna. (@iceman) 2018-09-11 18:35:07 +02:00
Chris 24eaac8681 CHG: the thread comms refactoring from offical pm3 repo
chg: FPC com speed limited to 115200 when compiled with FPC
chg: USART remake (@drandreas)
2018-09-06 21:43:20 +02:00
RFID Research Group eb0b5116a2
Merge pull request #25 from drandreas/rdv4-legic
Legic Tag Simulator
2018-09-06 20:26:39 +02:00
Colin J. Brigato 368fe11df0 Second Pass rewrite of flashmem. added command 'mem spibaud' to switch between 24/48Mhz operation. All is more consistant, less messy. All logic rewrittent avoiding multiple flashinit/flashstop. busywait is now at it's lowest possible. Beware : 48Mhz is VERY buggy cause of sillicon bug (see source for more info), and doesn't give much more than 24Mhz for now since we doubled nearly every operation speed here. 2018-09-06 05:15:52 +02:00
AntiCat 61e4eac2b2 Legic: Moved card simulator into separate file & cleaned interface.
Reader and card simulation have almost no common code. Moreover the sim
uses an SSP Clock at 212kHz for all timings to prevent any drifting from
the PRNG. This clock speed is not available in reader simulation mode (SSP
runs at up to 3.4MHz, and changes speed between TX and RX). For these
reasons having the code in separate files makes it significantly cleaner.
2018-09-05 23:03:04 +02:00
Colin J. Brigato 8d673fa1bf First pass rewrite of flashmem driver for optimization. Lot of changes here. Provides PoC of saving and recalling a tag in Standalone mode. Added some printing passthrough to client to azccomodate for vt100 eye-candyness. FastREAD mode implemented for flashmem, testable from client. Beta but functionnal. Reading the whole flash with 1Kb to 32kb buffers was ~730ms, now 380ms Max (even at 24Mhz spi baudrate) 2018-09-03 00:02:44 +02:00
Chris f1d0e9db4d fix: revert back 2018-08-29 19:42:46 +02:00
Chris 42e883f67b FIX: print_result - now prints correct len.
FIX: DOWNLOAD_BUFFER -  now with correct result logic
2018-08-28 21:15:28 +02:00
Chris 5f77121694 initial commit to be in sync the-soon-defunct repo pm3rdv40. 2018-08-12 21:54:31 +02:00
Chris bacf8aff0f add: FPC connector skeleton usart. Not working but if will be a starting point for those who might want to help out with it. 2018-07-30 09:54:44 +02:00
iceman1001 4d8488e14b CHG: https://github.com/Proxmark/proxmark3/pull/631 from offical repo. (piwi)
CHG: textual adjustments
2018-07-28 14:25:12 +02:00
Chris 79158c7360 chg; preparing for more cmds. 2018-07-06 00:24:04 +02:00
Chris 36d774506c chg: 'sm raw' - implemented 'r' don't read reply 2018-07-05 21:10:21 +02:00
Chris fca841122f chg: 'sc reader' - hooked up atr. 2018-07-05 16:32:10 +02:00
Chris ee006c6a7b add: sc upgrade - beta test 2018-07-05 14:38:31 +02:00
Chris e7342e7402 chg: 'sc upgr' shouldnt print too much 2018-07-05 11:37:04 +02:00
Chris f70b8be5de add: 'sc' - smart card commad [rdv40]
chg: test to read out firmware
2018-07-05 10:48:24 +02:00
Chris 3ecff83de2 chg: clean up 2018-07-04 15:29:27 +02:00
Chris 9571cf1d13 chg: and wrap FPC code with defines.. 2018-07-04 13:05:23 +02:00
Chris e09f9cbb32 add: RDV40 smart card module comms ( Thanks to @Willok! ) bitbanging i2c with it 2018-07-04 12:19:04 +02:00
iceman1001 501c29f76d add: support for reading flashmem 2018-05-22 12:09:17 +02:00
iceman1001 6b7819276d add: 'mem info' - rudamentary support for new command. 2018-05-06 09:26:06 +02:00
iceman1001 4cd72b95c5 fix: coverty scan #277726, unsigned value comparision always true. 2018-05-03 20:36:01 +02:00
iceman1001 989b80007c chg: removed debugstatements 2018-05-03 16:20:46 +02:00
iceman1001 e50fef6607 fix: 'mem load' - wrong offset when uploading 2018-05-03 16:10:38 +02:00
iceman1001 021c0a1349 ADD: 'mem' commands. For RDV40 devices only.
If you don't have one,  comment out inside client/Makefile this line

CFLAGS += -DWITH_FLASH
2018-05-03 12:15:03 +02:00
iceman1001 207fa2b574 add: potential fix for OSX uses, by @piwi
chg:  adapting fix to support iceman forks extended commands.
2018-05-02 08:11:29 +02:00
iceman1001 98f0e9a284 fix: print.c on device doesn't have support for formatter %f 2018-04-27 12:16:35 +02:00
iceman1001 6ab1b285a0 chg. 2018-04-20 19:50:56 +02:00
iceman1001 f5718fb448 chg: wiping / reading / writing flashmem 2018-04-20 16:11:10 +02:00