RfidResearchGroup/proxmark3
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75 commits

Author SHA1 Message Date
iceman1001
1033b67f3c chg: fpga lf simulation 2019-04-18 09:41:31 +02:00
iceman1001
72dd4d5dde chg: 'fpga lf sim' - 25% both on sides. 2019-04-18 09:27:38 +02:00
Philippe Teuwen
2f12e57408 Makefiles: remove spurious spaces/tabs 2019-03-10 11:35:03 +01:00
Philippe Teuwen
46af10d54d scripts: fix mix of spaces & tabs 2019-03-09 11:10:22 +01:00
Chris
1d51b2cd8f fix: variable name 
textual
 2018-09-08 14:15:05 +02:00
Chris
79afc031fc FIX: LF antenna discharge after interfer timings. As suggested by @ts And thanks to @drandreas who patiently explains fpga verilog code to me. 
This introduces a new majoe mode, FPGA_MAJOR_MODE_OFF_LF,  which should ONLY be used in sending loops for LF.   Basically the PWR_LO is set HIGH in order to discharge voltage faster.

Once sending is over,  the normal FPGA_MAJOR_MODE_OFF SHALL be used.
 2018-09-08 14:11:51 +02:00
AntiCat
e472a21194 FPGA Hi-Simulate: Added 212kHz SSP-Clock option 2018-09-05 23:01:55 +02:00
AntiCat
0994c91888 FPGA Hi-Simulate: Freed up 4 LUTs 2018-09-05 23:01:55 +02:00
AntiCat
cef5dc4e83 FPGA Hi-Simulate: Fixed documantation 2018-09-05 23:01:55 +02:00
AntiCat
6ca899d130 FPGA Hi-Simulate: Formatted code 2018-09-05 23:01:55 +02:00
Andreas Dröscher
bf123082e8 change: remove jerry-riged hysteresis based receiver from hi_read_tx 
This future got obsolete by a x-correlation based receiver.

This reverts commit 24fe4dffb4.
 2018-08-12 09:59:48 +02:00
Andreas Dröscher
83a4259ddc change: fixed xcorrelation for strong signal 
The initial code assumed phase shift modulation only. Lately,
xcorrelation is also used for load modulation. But the initial
the assumption that 11 bits are enough isn't true for load
modulation.

This change extends the registers by 2 bits and compresses the
uper bits to preserve the sensitivity on the lower end.
 2018-08-10 02:36:04 +02:00
Iceman
c339035ec5
Revert "WIP: Clean Legic Reader" 2018-08-06 15:05:36 +02:00
Andreas Dröscher
78d5188922 change: legic reader now uses xcorrelation and ssc based io 
- Even tough legic tags transmit just AM using xcorrelation
   results in a significantly better signal quality.
 - Switching from bit bang to a hardware based ssc frees
   up CPU time for other tasks e.g. demodulation
 2018-08-04 23:13:17 +02:00
Andreas Dröscher
7517c894d2 change: remove jerry-riged hysteresis based receiver from hi_read_tx 
This future got obsolete by a x-correlation based receiver.

This reverts commit 24fe4dffb4.
 2018-08-04 23:13:17 +02:00
iceman1001
84b7ea82bb fix: legic functionality for RDV40. Getting 2-3cm reading distances now. 2018-07-28 18:45:13 +02:00
iceman1001
ccfcd8e991 CHG: Thanks to @pwpiwi , his latest adjustments to HF. 2017-11-10 19:51:37 +01:00
iceman1001
994248265d FIX: changing the result booleran when sending over serial. 2017-10-29 19:22:03 +01:00
iceman1001
1a7badc025 REM: removed unused file 2017-10-25 14:12:29 +02:00
iceman1001
3fd792940b FIX: @satsuoni fixes with pm3 offical version. 2017-10-25 13:59:49 +02:00
iceman1001
c2444a885b CHG: FeliCa and 14b/15 enhancements. or it should be atleast. Until it gets tested.. 2017-10-24 18:24:30 +02:00
iceman1001
8f201fd173 chg: removed some commented out code 2017-10-23 22:10:16 +02:00
iceman1001
f3ebfcb9a0 chg: reverting old @satsuoni felica changes. 
chg: applied @pwpiwi 's fixes for iso 14B / 15
 2017-10-23 21:56:47 +02:00
iceman1001
74ac547db8 REM: removed unused file 2017-10-20 20:29:38 +02:00
iceman1001
4b63f940f1 CHG: FeliCa implemenation by @satsuoni 2017-10-20 20:27:44 +02:00
iceman1001
11f975c37e ADD: FPGA FeliCa binary file aswell.. Thanks to @Satsuoni 2017-10-10 14:07:30 +02:00
iceman1001
7af5e29e22 ADD: FPGA missing file Thanks to @Satsuoni 2017-10-10 14:03:09 +02:00
iceman1001
5c1f7686f6 ADD: FPGA code to support FeliCa / ISO 18092. Thanks to @satsuoni 2017-10-10 14:01:58 +02:00
iceman1001
8bc17414fd new coverity scan complains.. 
fix 'lf hitag'  bit comparisions wrong
fix 'standalone mode'  logically dead code
 2017-07-07 15:45:40 +02:00
iceman1001
1ef14f2d9d fix: the updated fpga_hf.bit file, where iso15693 should work. 2017-07-07 09:20:23 +02:00
iceman1001
07bc72b880 CHG: continue code cleanup. 
REM: removed stdint.h ,  since we are using c99 when compiling.
 2017-02-23 00:32:14 +01:00
iceman1001
496b673453 Added some comments 2017-01-26 14:23:48 +01:00
iceman1001
eb7eab8570 code cleanup. 2016-03-20 19:33:59 +01:00
iceman1001
ef8e50c64b CHG: has the order of varibles some impact? I re-arranged them to match. 2016-03-13 07:18:04 +01:00
iceman1001
f5d2e7f7df CHG: @ematrix / @piwi fixes for 'hf snoop' 2015-11-02 11:41:25 +01:00
iceman1001
afa86e5c03 ADD: help text for 'hf snoop' / 'hf search' / 'hf list' 
CHG: minor code changes.
CHG: makefile ,  moved hi_sniffer.v from LF into HF row.  @piwi suggestion for PR https://github.com/Proxmark/proxmark3/pull/141
 2015-11-01 19:49:08 +01:00
iceman1001
eb4222d773 CHG: the updated fpga image for the "hf snoop" 2015-10-30 09:10:09 +01:00
iceman1001
1d0ccbe04b ADD: added the "hf snoop" patch original from @Enio, rearranged by @Etmatrix. 
ADD:  added the "t55x7" refactoring by @marshmellow42
 2015-10-27 21:47:21 +01:00
pwpiwi
705bfa1058 fixing iso14443b (issue #103): 
- increased DMA_BUFFER_SIZE to avoid occasional circular buffer overflows.
- minor code cleanups
 2015-06-22 22:03:43 +02:00
pwpiwi
467340996e fixing iso14443b (issue #103): 
- fix hf 14b snoop
- fix hf 14b sim
 2015-06-21 18:04:24 +02:00
pwpiwi
da586b1702 fixing iso14443b (issue #103): 
- revert removal of FPGA_HF_READER_RX_XCORR_848_KHZ. Need to be able to switch to 424kHz for ISO15693.
 2015-06-18 15:41:30 +02:00
pwpiwi
51d4f6f114 fixing iso14443b (issue #103): 
- fix: IQ demodulator (FPGA)
- fix: approximately align reader signal delay to tag response delay (FPGA)
- fix: remove deprecated RSSI calculation to improve decoder speed (iso14443b.c)
- fix: better approximation of signal amplitude to avoid false carrier detection (iso14443b.c)
- fix: remove initial power off in iso14443b raw command (iso14443b.c)
- add: enable tracing for iso14443b raw command (iso14443b.c)
- fix: client crashed when checking CRC for incomplete responses (iso14433b.c)
- speeding up snoop to avoid circular buffer overflow
- added some comments for better documentation
- rename functions (iso14443 -> iso14443b)
- remove unused code in hi_read_rx_xcorr.v
 2015-06-17 20:27:36 +02:00
pwpiwi
09c66f1f09 fixing iso14443b (issue #103): fix timing issue (speeding up 
the decoders)
 2015-06-03 13:28:28 +02:00
pwpiwi
5b95953d42 fixing iso14443b (issue #103): 
- most significant bit of tag data (which happens to be the sign bit)
had been dropped when snooping (FPGA change)
- avoid trying to decode both tag and reader data when snooping (we don't
have the time to do so).
 2015-06-02 22:50:16 +02:00
pwpiwi
30364d2711 fix: broken edge detector implementation in hi_iso14443a.v resulted in decreased sensitivity 2015-03-09 20:01:37 +01:00
pwpiwi
7843130a58 fix: (issue #72) LF simulation didn't work with lo_edge_detect.v 2015-03-06 07:42:54 +01:00
pwpiwi
7554370c30 bugfix hf 14a sim / hf mf sim: polarity of tag subcarrier modulation was wrong 2015-02-11 21:14:34 +01:00
Martin Holst Swende
09b69422e2 This was resynthezised along with my hf-changes. Nothing changed though 2015-01-15 15:29:03 +01:00
Martin Holst Swende
645c960f61 Implemented new FPGA mode for iclass tag simulation. Reduces arm-side size of transfer/memory by a factor of 8. Makes for easier arm-side encoding of messages, for when we start needing to do that on the fly instead of using precalculated messages 2015-01-15 15:16:34 +01:00
iZsh
238c503c38 fpga/min_max_tracker.v: english 2014-06-27 23:28:56 +02:00